boards/renesas/rzg2ul_smarc/doc/index.rst
.. zephyr:board:: rzg2ul_smarc
Overview
The Renesas RZ/G2UL SMARC Evaluation Board Kit (RZ/G2UL-EVKIT) consists of a SMARC v2.1 module board and a carrier board.
Device: RZ/G2UL (Type-1) R9A07G043U11GBG
SMARC v2.1 Module Board Functions
AT25QL128A <https://www.renesas.com/en/products/memory-logic/non-volatile-memory/spi-nor-flash/at25ql128a-128mbit-17v-minimum-spi-serial-flash-memory-dual-io-quad-io-and-qpi-support>_5P35023 <https://www.renesas.com/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator>_ implementedDA9062 <https://www.renesas.com/en/products/power-management/multi-channel-power-management-ics-pmics/da9062-pmic-designed-applications-requiring-85a>_ implementedCarrier Board Functions
Hardware
The Renesas RZ/G2UL MPU documentation can be found at RZ/G2UL Group Website_
.. figure:: rzg2ul_block_diagram.webp :width: 600px :align: center :alt: RZ/G2UL group feature
RZ/G2UL block diagram (Credit: Renesas Electronics Corporation)
.. zephyr:board-supported-hw::
Programming and Debugging
Applications for the rzg2ul_smarc board can be built in the usual way as
documented in :ref:build_an_application.
By default, J-Link RTT Viewer_ is used by Zephyr running on CM33 for providing serial console.
The only serial port (SER3_UART micro-USB) is reserved for CA55 to run Linux.
.. note::
Set SW1-1 on the board to "OFF" to select JTAG debug mode, which is required for RTT to work.
There are two ways to use the RTT Viewer on this board. The basic steps for each method are described below:
After the Zephyr application has been built successfully, open J-Link RTT Viewer and configure the connection as follows:
Next, open Ozone Debugger_ and choose "Create New Project". Inside the "New Project Wizard"
configure the settings as follows:
zephyr.elf file. The path should resemble zephyrproject/zephyr/build/zephyr/zephyr.elfAfter the Zephyr application has been built successfully, open the zephyr.map file located in
zephyrproject\zephyr\build\zephyr\zephyr.map. Locate the symbol _SEGGER_RTT and copy its
address value in hexadecimal.
Then, perform the "Flashing" steps described below to run the Zephyr application using U-Boot. As soon as the application is invoked, open J-Link RTT Viewer and configure the connection as follows:
_SEGGER_RTT symbol copied earlier... note::
When using RTT Viewer with a Zephyr application launched by U-Boot, it is important to connect the RTT Viewer immediately after executing the U-Boot command sequence. This helps avoid losing early log output.
It is possible to load and execute a Zephyr application binary on
this board on the Cortex-M33 System Core from
the internal SRAM, using JLink debugger (:ref:jlink-debug-host-tools).
Here is an example for building and debugging with the :zephyr:code-sample:hello_world application.
.. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rzg2ul_smarc/r9a07g043u11gbg/cm33 :goals: build debug
RZ/G2UL-EVKIT is designed to start different systems on different cores. It uses Yocto as the build system to build Linux system and boot loaders to run Zephyr on Cortex-M33 with u-boot. The minimal steps are described below.
Follow "2.2 Building Images" of SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide_ to prepare the build environment.
At step (4), follow step "2. Download Multi-OS Package" and "3. Add the layer for Multi-OS Package"
of "3.2 OpenAMP related stuff Integration for RZ/G2L, RZ/G2LC and RZ/G2UL" of Release Note for RZ/G Multi-OS Package V2.2.0_
to add the layer for Multi-OS Package.
.. code-block:: console
$ cd ~/rzg_vlp_<pkg ver> $ unzip <Multi-OS Dir>/r01an5869ej0220-rzg-multi-os-pkg.zip $ tar zxvf r01an5869ej0220-rzg-multi-os-pkg/meta-rz-features_multi-os_v2.2.0.tar.gz $ bitbake-layers add-layer ../meta-rz-features/meta-rz-multi-os/meta-rzg2l
Start the build:
.. code-block:: console
$ MACHINE=smarc-rzg2ul bitbake core-image-minimal
The below necessary artifacts will be located in the build/tmp/deploy/images
+---------------+------------------------------------------------------+ | Artifacts | File name | +===============+======================================================+ | Boot loader | bl2_bp-smarc-rzg2ul.srec | | | | | | fip-smarc-rzg2ul.srec | +---------------+------------------------------------------------------+ | Flash Writer | Flash_Writer_SCIF_RZG2UL_SMARC_DDR4_1GB_1PCS.mot | +---------------+------------------------------------------------------+
Follow "4.2 Startup Procedure" of SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide_ for power supply and board setting
at SCIF download (SW11[1:4] = OFF, ON, OFF, ON) and (SW1[1:3] = ON, OFF, OFF)
Follow "4.3 Download Flash Writer to RAM" of SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide_ to download Flash Writer to RAM
Follow "4.4 Write the Bootloader" of SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide_ to write the boot loader
to the target board by using Flash Writer.
Follow "4.5 Change Back to Normal Boot Mode" with switch setting (SW11[1:4] = OFF, OFF, OFF, ON) and (SW1[1:2] = ON, OFF)
Follow "3. Preparing the SD Card" of SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide_ to write files to the microSD Card
Copy zephyr.bin file to microSD card
Follow "4.4.2 CM33 Sample Program Invocation with u-boot" from the beginning to step 4 of Release Note for RZ/G Multi-OS Package V2.2.0_
Execute the commands stated below on the console to start zephyr application with CM33 core. Here, "N" stands for the partition number in which you stored zephyr.bin file.
.. code-block:: console
Hit any key to stop autoboot: 2
=> dcache off
=> mmc dev 1
=> fatload mmc 1:N 0x00010000 zephyr.bin
=> fatload mmc 1:N 0x40010000 zephyr.bin
=> cm33 start_normal 0x00010000 0x40010000
=> dcache on
By default, the only valid serial port (SER3_UART micro-USB port) controlled by SCIF0 is used by Linux to print Linux console output. Therefore, in order to use it from Zephyr, the Linux console must first be disabled. To do this, run the following command in the Linux console to unbind the SCIF0 driver:
.. code-block:: console
$ echo 1004b800.serial | tee /sys/bus/platform/drivers/sh-sci/unbind
This allows the SCIF0 to be accessed from the Zephyr side in debug mode for providing serial console. Please note that the SCIF0 driver is disabled by default on the Zephyr side to prevent conflicts.
References
.. target-notes::
.. _RZ/G2UL Group Website: https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzg2ul-general-purpose-microprocessors-single-core-arm-cortex-a55-10ghz-cpu-and-single-core-arm-cortex-m33
.. _RZG2UL-EVKIT Website: https://www.renesas.com/en/products/microcontrollers-microprocessors/rz-mpus/rzg2ul-evkit-evaluation-board-kit-rzg2ul-mpu
.. _SMARC EVK of RZ/G2L, RZ/G2LC, RZ/G2UL Linux Start-up Guide: https://www.renesas.com/en/document/gde/smarc-evk-rzg2l-rzg2lc-rzg2ul-linux-start-guide-rev106
.. _Release Note for RZ/G Multi-OS Package V2.2.0: https://www.renesas.com/en/document/rln/release-note-rzg-multi-os-package-v220?r=1522841
.. _J-Link RTT Viewer: https://www.segger.com/products/debug-probes/j-link/tools/rtt-viewer
.. _Ozone Debugger: https://www.segger.com/products/development-tools/ozone-j-link-debugger/