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Overview

boards/renesas/ek_ra8t2/doc/index.rst

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.. zephyr:board:: ek_ra8t2

Overview

The EK-RA8T2, an Evaluation Kit for RA8T2 MCU Group, enables users to seamlessly evaluate the features of the RA8T2 MCU group and develop embedded systems applications.

The MCU in this series incorporates a high-performance Arm® Cortex®-M85 core running up to 1 GHz and Arm® Cortex®-M33 core running up to 250 MHz with the following features:

  • Up to 1 MB MRAM
  • 2 MB SRAM (256 KB of CM85 TCM RAM, 128 KB CM33 TCM RAM, 1664 KB of user SRAM)
  • Octal Serial Peripheral Interface (OSPI)
  • Layer 3 Ethernet Switch Module (ESWM), USBFS, SD/MMC Host Interface
  • Analog peripherals
  • Security and safety features

MCU Native Pin Access

  • 1 GHz Arm® Cortex®-M85 core and 250 MHz Arm® Cortex®-M33 core based RA8T2 MCU 289 pins, BGA package
  • 1 MB MRAM, 2 MB SRAM with ECC
  • Native pin access through 2 x 40-pin headers (not populated)
  • SDRAM pin access through 2 x 26-pin headers (not populated)
  • Ethernet pin access through 4 x 14-pin headers (not populated)
  • GPTP pin access through 2 x 5-pin headers (not populated)
  • TAS status pin access through 1 x 5-pin headers (not populated)
  • MCU current measurement points for precision current consumption measurement
  • Multiple clock sources - RA8T2 MCU oscillator and sub-clock oscillator crystals, providing precision 24.000 MHz and 32,768 Hz reference clocks. Additional low-precision clocks are available internal to the RA8T2 MCU

System Control and Ecosystem Access

  • USB Full Speed Host and Device (USB-C connector)

  • Three 5 V input sources

    • USB (Debug, Full Speed)
    • External power supply (using surface mount clamp test points and power input vias)

  • Three Debug modes

    • Debug on-board (SWD and JTAG)
    • Debug in (ETM, SWD, SWO, and JTAG)
    • Debug out (SWD, SWO, and JTAG)

  • User LEDs and buttons

    • Three User LEDs (red, blue, green)
    • Power LED (white) indicating availability of regulated power
    • Debug LED (yellow) indicating the debug connection
    • Two User buttons
    • One Reset buttons

  • Five most popular ecosystems expansions

    • Two Seeed Grove® system (I2C/I3C/Analog) connectors (not populated)
    • SparkFun® Qwiic® connector (not populated)
    • Two Digilent PmodTM (SPI, UART and I2C) connectors
    • Arduino™ (Uno R3) connector
    • MikroElektronikaTM mikroBUS connector (not populated)

  • Combined debugger and MCU boot configuration switches

Special Feature Access

  • Ethernet (RJ45 GMII interface) x 2
  • PMIC Diagnostic Port pin access through 4-pin header (not populated)
  • 64 MB (512 Mb) External Octal-SPI Flash (present in the MCU Native Pin Access area)
  • 64 MB (512 Mb) SDRAM (present in the MCU Native Pin Access area)
  • Configuration switches
  • EtherCAT ID configuration switches and EEPROM
  • Ethernet activity LEDs (green x 2, yellow x 2)
  • EtherCAT LEDs (red x 1, green x 3)
  • Network LEDs (red x 2, green x 2)
  • CAN-FD interface x 2
  • Isolated MODBUS / RS485 interface

Hardware

Detailed hardware features can be found at:

  • RA8T2 MCU: RA8T2 Group User's Manual Hardware_
  • EK-RA8T2 board: EK-RA8T2 - User's Manual_

Supported Features

.. zephyr:board-supported-hw::

Dual Core Operation

The EK-RA8T2 supports dual core operation with both the Cortex-M85 (CPU0) and Cortex-M33 (CPU1) cores. By default, the CM85 core is the boot core and is responsible for initializing the system and starting the CM33 core.

Memory Usage

By default, MRAM (Flash) and SRAM are split evenly between the two cores. Users can manually change the address and size for MRAM (Flash) and SRAM as follows node:

  • CPU0: &code_mram_cm85, &sram0
  • CPU1: &code_mram_cm33, &sram1

.. note::

  • MRAM usable range: 0x0200_0000 ... 0x0210_0000 (1 MB)
  • SRAM usable range: 0x2200_0000 ... 0x221A_0000 (1664 KB)

Dual Core Flashing

When flashing or debugging dual-core samples, ensure that CONFIG_SOC_RA_ENABLE_START_SECOND_CORE is selected for the CM85 image. The CM85 core is responsible for starting the CM33 core in soc_late_init_hook.

Programming and Debugging

Applications for the ek_ra8t2 board configuration can be built, flashed, and debugged in the usual way. See :ref:build_an_application and :ref:application_run for more details on building and running.

Here is an example for the :zephyr:code-sample:hello_world application on CM85 core.

.. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: ek_ra8t2/r7ka8t2lflcac/cm85 :goals: flash

Open a serial terminal, reset the board (press the reset switch), and you should see the following message in the terminal:

.. code-block:: console

***** Booting Zephyr OS v4.2.0-xxx-xxxxxxxxxxxxx ***** Hello World! ek_ra8t2/r7ka8t2lflcac/cm85

For the CM33 core, you can use the --sysbuild flow to build a minimal first-core launcher image that starts the CM33 core.

.. zephyr-app-commands:: :tool: west :zephyr-app: samples/hello_world :board: ek_ra8t2/r7ka8t2lflcac/cm33 :goals: build flash :west-args: --sysbuild

Flashing

The program can be flashed to EK-RA8T2 via the on-board SEGGER J-Link debugger. SEGGER J-Link's drivers are available at https://www.segger.com/downloads/jlink/

To flash the program to the board:

  1. Connect to J-Link OB via USB port to host PC

  2. Make sure J-Link OB jumper is in default configuration as described in EK-RA8T2 - User's Manual_

  3. Execute west command

    .. code-block:: console

    west flash -r jlink

MCUboot bootloader

The sysbuild makes it possible to build and flash all necessary images needed to bootstrap the board.

To build the sample application using sysbuild use the command:

.. zephyr-app-commands:: :tool: west :zephyr-app: samples/hello_world :board: ek_ra8t2/r7ka8t2lflcac/cm85 :goals: build flash :west-args: --sysbuild :gen-args: -DSB_CONFIG_BOOTLOADER_MCUBOOT=y

By default, Sysbuild creates MCUboot and user application images.

Build directory structure created by sysbuild is different from traditional Zephyr build. Output is structured by the domain subdirectories:

.. code-block::

build/ ├── hello_world │ └── zephyr │ ├── zephyr.elf │ ├── zephyr.hex │ ├── zephyr.bin │ ├── zephyr.signed.bin │ └── zephyr.signed.hex ├── mcuboot │ └── zephyr │ ├── zephyr.elf │ ├── zephyr.hex │ └── zephyr.bin └── domains.yaml

.. note::

With --sysbuild option, MCUboot will be rebuilt and reflashed every time the pristine build is used.

To only flash the user application in subsequent builds, use:

.. code-block:: console

$ west flash --domain hello_world

For more information about the system build please read the :ref:sysbuild documentation.

You should see the following message in the terminal:

.. code-block:: console

*** Booting MCUboot v2.2.0-171-g8513be710e5e *** *** Using Zephyr OS build v4.2.0-6183-gdd720e2f0dc5 *** I: Starting bootloader I: Image index: 0, Swap type: none I: Image index: 0, Swap type: none I: Primary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3 I: Secondary image: magic=unset, swap_type=0x1, copy_done=0x3, image_ok=0x3 I: Boot source: none I: Image index: 0, Swap type: none I: Image index: 0, Swap type: none I: Image index: 0, Swap type: none I: Image index: 0, Swap type: none I: Bootloader chainload address offset: 0x10000 I: Image version: v0.0.0 I: Jumping to the first image slot *** Booting Zephyr OS build v4.2.0-6183-gdd720e2f0dc5 *** Hello World! ek_ra8t2/r7ka8t2lflcac/cm85

References

  • EK-RA8T2 Website_
  • RA8T2 MCU group Website_

.. _EK-RA8T2 Website: https://www.renesas.com/en/design-resources/boards-kits/ek-ra8t2

.. _RA8T2 MCU group Website: https://www.renesas.com/en/products/ra8t2

.. _EK-RA8T2 - User's Manual: https://www.renesas.com/en/document/mat/ek-ra8t2-v1-users-manual

.. _RA8T2 Group User's Manual Hardware: https://www.renesas.com/en/document/mah/ra8t2-group-users-manual-hardware