boards/amd/versalnet_rpu/doc/index.rst
.. zephyr:board:: versalnet_rpu
Overview
This configuration provides support for the RPU(R52), real-time processing unit on Xilinx Versal Net SOC, it can operate as following:
This processing unit is based on an ARM Cortex-R52 CPU, it also enables the following devices:
Hardware
.. zephyr:board-supported-hw::
This board configuration uses a system timer tick frequency of 100 MHz.
This board configuration uses a single serial communication channel with the on-chip UART0.
Although Flash, DDR and OCM memory regions are defined in the DTS file, all the code plus data of the application will be loaded in the sram0 region, which points to the DDR memory. The ocm0 memory area is currently available for usage, although nothing is placed there by default.
The following platform features are unsupported:
Programming and Debugging
.. zephyr:board-supported-runners::
This board supports two deployment targets:
For QEMU target, XSDB (Xilinx System Debugger) is not used and therefore PDI (Programmable Device Image) is not required. QEMU provides direct emulation without needing hardware initialization files.
Build and run with QEMU:
.. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: versalnet_rpu :goals: build run
Alternatively, you can build and run separately:
.. code-block:: console
west build -b versalnet_rpu samples/hello_world west build -t run
For deployment on real Versal Net hardware, XSDB and a PDI file are required. The PDI file contains the hardware initialization and boot configuration needed for the physical device.
Build the application:
.. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: versalnet_rpu :goals: build
Flash to real hardware with PDI file:
.. code-block:: console
west flash --runner xsdb --pdi /path/to/your.pdi
You should see the following message on the console:
.. code-block:: console
Hello World!
References