.. zephyr:board:: max32666evkit

Overview

The MAX32666EVKIT provides a platform for evaluating the capabilities of the MAX32665 and MAX32666 high-efficiency Arm® microcontrollers and audio DSP for wearable and hearable device applications.

The Zephyr port is running on the MAX32666 MCU.

Hardware

MAX32666 MCU:
- High-Efficiency Microcontroller and Audio DSP for Wearable and Hearable Devices
  - Arm Cortex-M4 with FPU Up to 96MHz
  - Optional Second Arm Cortex-M4 with FPU Optimized for Data Processing
  - Low-Power 7.3728MHz System Clock Option
  - 1MB Flash, Organized into Dual Banks 2 x 512KB
  - 560KB (448KB ECC) SRAM; 3 x 16KB Cache
  - Optional Error Correction Code (ECC-SEC-DED)for Cache, SRAM, and Internal Flash
- Bluetooth 5 Low Energy Radio
  - 1Mbps and 2Mbps Data Throughput
  - Long Range (125kbps and 500kbps)
  - Advertising Extension
  - Rx Sensitivity: -95dbm; Tx Power Up to +4.5dbm
  - On-Chip Matching with Single-Ended Antenna Port
- Power Management Maximizes Operating Time for Battery Applications
  - Integrated SIMO SMPS for Coin-Cell Operation
  - Dynamic Voltage Scaling Minimizes Active Core Power Consumption
  - 27.3μA/MHz at 3.3V Executing from Cache
  - Selectable SRAM Retention in Low Power Modes with RTC Enabled
- Multiple Peripherals for System Control
  - Three QSPI Master/Slave with Three Chip Selects Each
  - Three 4-Wire UARTs
  - Three I2C Master/Slave
  - Up to 50 GPIO
  - QSPI (SPIXF) with Real-Time Flash Decryption
  - QSPI (SPIXR) RAM Interface Provides SRAMExpansion
  - 8-Input 10-Bit Delta-Sigma ADC 7.8ksps
  - USB 2.0 HS Engine with Internal Transceiver
  - PDM Interface Supports Two Digital Microphones
  - I2S with TDM
  - Six 32-Bit Timers
  - Two High-Speed Timers
  - 1-Wire Master
  - Sixteen Pulse Trains (PWM)
  - Secure Digital Interface Supports SD3.0/SDIO3.0/eMMC4.51
- Secure Valuable IP/Data with Hardware Security
  - Trust Protection Unit (TPU) with MAA SupportsFast ECDSA and Modular Arithmetic
  - AES128/192/256, DES, 3DES, Hardware Accelerator
  - TRNG Seed Generator
  - SHA-2 Accelerator•Secure Bootloader
Benefits and Features of MAX32666EVKIT:
- Bluetooth SMA connector with a 2.4GHz Hinged Whip Antenna
- 1.28in 128 x 128 Monochrome TFT Display
- 64MB XIP Flash
- 1MB XIP RAM
- Stereo Audio Codec with Line-In and Line-Out 3.5mm Jacks
- Digital Audio Microphone
- USB 2.0 Micro B Interface
- USB 2.0 Micro B to Serial UARTs
- Micro SD Card Interface
- Select GPIOs Accessed Through a 0.1in Header
- Access to the 8 Analog Inputs Through a 0.1in Header
- Arm® or SWD JTAG 20-Pin Header
- 1-Wire RJ11 Port
- Can Be Solely Sourced by a Coin Cell Battery
- Board Power Provided by Either USB Port
- Individual Power Measurement on All IC Rails Through Jumpers
- On-Board 1.8V and 3.3V Regulators
- Two General-Purpose LEDs and Two General-Purpose Pushbutton Switches

Supported Features

.. zephyr:board-supported-hw::

Connections and IOs

+-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | Name | Name | Settings | Description | +===========+===============+===============+==================================================================================================+ | JP1 | I2C0_SCL/SDA | | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects I2C0 SCL and SDA 1.5K pullups from VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects I2C0 SCL and SDA 1.5K pullups to VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP2 | I2C1_SCL/SDA | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects I2C1 SCL and SDA 1.5K pullups from VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects I2C1 SCL and SDA 1.5K pullups to VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP3 | I2C2_SCL/SDA | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects I2C2 SCL and SDA 1.5K pullups from VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects I2C2 SCL and SDA 1.5K pullups to VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP4 | P1_14 | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects LED D2 from P1_14. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects LED D2 to P1_14. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP5 | P1_15 | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects LED D3 from P1_15. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects LED D3 to P1_15. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP6 | VBUS | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-1 | | | Connects VBUS to USB connector CN1 to supply board power. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-3 | | | Connects VBUS to USB connector CN2 to supply board power. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP7 | N/A | N/A | N/A | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP8 | N/A | N/A | N/A | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP9 | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_20 | | | 2-1 | | | Connects the USB to serial UART to GPIO P0_20 (RX1). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_28 | | | 2-3 | | | Connects the USB to serial UART to GPIO P0_28 (RX2). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP10 | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_21 | | | 2-1 | | | Connects the USB to serial UART to GPIO P0_21 (TX1). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_29 | | | 2-3 | | | Connects the USB to serial UART to GPIO P0_29 (TX2). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP11 | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_22 | | | 2-1 | | | Connects the USB to serial UART to GPIO P0_22 (CTS1_N). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_30 | | | 2-3 | | | Connects the USB to serial UART to GPIO P0_30 (CTS2_N). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP12 | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_23 | | | 2-1 | | | Connects the USB to serial UART to GPIO P0_23 (RTS1_N). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | P0_31 | | | 2-3 | | | Connects the USB to serial UART to GPIO P0_31 (RTS2_N). | | | | +-----------+ | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP13 | VREGI | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-1 | | | Connects VREGI to the coin cell battery. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-3 | | | Connects VREGI to 3V3. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP14 | VDDIOH | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 1-2 | | | Connects VDDIOH to VREGO_A | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 3-4 | | | Connects VDDIOH to 1V8. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 5-6 | | | Connects VDDIOH to 3V3. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP15 | VDDIOH | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VDDIOH. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP16 | VDDB | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VDDB. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VDDB. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP17 | VDDIO | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-1 | | | Connects VDDIO to VREGO_A. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | 2-3 | | | Connects VDDIO to 1V8. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP18 | VDDIO | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VDDIO. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VDDIO. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP19 | VDDA | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VDDA. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VDDA. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP20 | VCORE_A | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VCORE_A. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VCORE_A. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP21 | VCORE_B | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VCORE_B. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VCORE_B. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP22 | VTXIN | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VTXIN. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VTXIN. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+ | JP23 | VRXIN | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Open | | | Disconnects power from VRXIN. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | Close | | | Connects power to VRXIN. | | | | | +-----------+ | +-------------------------------------------------------------------------------+ | | | | | | +-----------+---------------+---------------+--------------------------------------------------------------------------------------------------+

Programming and Debugging

.. zephyr:board-supported-runners::

Flashing

The MAX32666 MCU can be flashed by connecting an external debug probe to the SWD port. SWD debug can be accessed through the Cortex 10-pin connector, J6. Logic levels are fixed to VDDIOH (1.8V or 3.3V).

Once the debug probe is connected to your host computer, then you can simply run the west flash command to write a firmware image into flash. To perform a full erase, pass the --erase option when executing west flash.

.. note::

This board uses OpenOCD as the default debug interface. You can also use a Segger J-Link with Segger's native tooling by overriding the runner, appending --runner jlink to your west command(s). The J-Link should be connected to the standard 20-pin connector (J7) or a Cortex® 10-pin connector (J6).

Debugging

Please refer to the Flashing_ section and run the west debug command instead of west flash.

References

MAX32666EVKIT web page_

.. _MAX32666EVKIT web page: https://www.analog.com/en/design-center/evaluation-hardware-and-software/evaluation-boards-kits/MAX32666EVKIT.html