3rd-party/tbb/examples/graph/logic_sim/readme.html
This directory contains a simple tbb::flow example that performs simplistic digital logic simulations with basic logic gates that can be easily composed to create more interesting circuits. It exemplifies the multifunction_node and the indexer_node CPF, among others.
System Requirements
For the most up to date system requirements, see the release notes.
Files
basics.hSeveral I/O devices and basic gates. one_bit_adder.hA one-bit full adder composed of basic gates. four_bit_adder.hA four-bit full adder composed of one-bit adders. D_latch.hA D-latch composed of basic gates. test_all.cppA simple test program that exercises the code in the headers. MakefileMakefile for building the example.
Directories
msvsContains Microsoft* Visual Studio* workspace for building and running the example with the Intel® C++ Compiler (Windows* systems only).
For information about the minimum supported version of IDE, see release notes.
Build instructions
General build directions can be found here.
Usage
test_all -h_Prints the help for command line options test_all [#threads_=value] [verbose] [silent] [#threads]#threads is the number of threads to use; a range of the form low[:high] where low and optional high are non-negative integers, or 'auto' for a platform-specific default number.
verbose print diagnostic output to screen
silent limits output to timing info; overrides verbose
To run a short version of this example, e.g., for use with Intel® Parallel Inspector: Build a debug version of the example (see the build instructions).
Run it with the desired number of threads, e.g., test_all 4.
Legal Information
Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries.
* Other names and brands may be claimed as the property of others.
© 2020, Intel Corporation