implementations/c-apple-silicon/README.md
This implementation is specifically optimized for Apple Silicon (M1/M2/M3) chips, which have strict power management and thermal throttling that can interfere with traditional memory bus noise generation.
Standard implementations that hammer the memory bus continuously are quickly detected by the macOS power management unit (PMU) as "runaway processes." This results in:
This implementation uses a "Pulse-Packet" strategy:
This intermittent load tricks the PMU into thinking the process is behaving normally, allowing sustained high-power transmission without throttling.
Compile the program:
gcc -O3 main.c -o main
Run with a tune file:
./main ../../tunes/mary_had_a_little_lamb.tune
Important: For best results: