Documentation/firmware-guide/acpi/chromeos-acpi-device.rst
.. SPDX-License-Identifier: GPL-2.0
Hardware functionality specific to Chrome OS is exposed through a Chrome OS ACPI device. The plug and play ID of a Chrome OS ACPI device is GGL0001 and the hardware ID is GOOG0016. The following ACPI objects are supported:
.. flat-table:: Supported ACPI Objects :widths: 1 2 :header-rows: 1
This control method returns the switch positions for Chrome OS specific hardware switches.
None
An integer containing the switch positions as bitfields:
.. flat-table:: :widths: 1 2
All other bits are reserved and should be set to 0.
This control method returns the hardware ID for the Chromebook.
None
A null-terminated ASCII string containing the hardware ID from the Model-Specific Data area of EEPROM.
Note that the hardware ID can be up to 256 characters long, including the terminating null.
This control method returns the firmware version for the rewritable portion of the main processor firmware.
None
A null-terminated ASCII string containing the complete firmware version for the rewritable portion of the main processor firmware.
This control method returns the firmware version for the read-only portion of the main processor firmware.
None
A null-terminated ASCII string containing the complete firmware version for the read-only (bootstrap + recovery ) portion of the main processor firmware.
This control method returns information about the current boot.
None
.. code-block::
Package { Reserved1 Reserved2 Active EC Firmware Active Main Firmware Type Reserved5 }
.. flat-table:: :widths: 1 1 2 :header-rows: 1
Active EC firmware
DWORD
The EC firmware which was used during boot.
Set to 0 if EC firmware is always read-only.
Active Main Firmware Type
DWORD
The main firmware type which was used during boot.
Other values are reserved.
This control method returns information about Chrome OS specific GPIO assignments for Chrome OS hardware, so the kernel can directly control that hardware.
None
.. code-block::
Package {
Package {
// First GPIO assignment
Signal Type //DWORD
Attributes //DWORD
Controller Offset //DWORD
Controller Name //ASCIIZ
},
...
Package {
// Last GPIO assignment
Signal Type //DWORD
Attributes //DWORD
Controller Offset //DWORD
Controller Name //ASCIIZ
}
}
Where ASCIIZ means a null-terminated ASCII string.
.. flat-table:: :widths: 1 1 2 :header-rows: 1
Signal Type
DWORD
Type of GPIO signal
Other values are reserved.
Attributes
DWORD
Signal attributes as bitfields:
This control method returns information about the NVRAM (CMOS) locations used to communicate with the BIOS.
None
.. code-block::
Package {
NV Storage Block Offset //DWORD
NV Storage Block Size //DWORD
}
.. flat-table:: :widths: 1 1 2 :header-rows: 1
This control method returns the physical memory address of the start of the main processor firmware flashmap.
None
A DWORD containing the physical memory address of the start of the main processor firmware flashmap.
This control method returns the verified boot data block shared between the firmware verification step and the kernel verification step.
None
A buffer containing the verified boot data block.
This control method returns the SHA-1 or SHA-256 hash that is read out of the Management Engine extended registers during boot. The hash is exported via ACPI so the OS can verify that the ME firmware has not changed. If Management Engine is not present, or if the firmware was unable to read the extended registers, this buffer can be zero.
None
A buffer containing the ME hash.
This control method returns a list of the other control methods supported by the Chrome OS hardware device.
None
A package containing a list of null-terminated ASCII strings, one for each control method supported by the Chrome OS hardware device, not including the MLST method itself. For this version of the specification, the result is:
.. code-block::
Package {
"CHSW",
"FWID",
"HWID",
"FRID",
"BINF",
"GPIO",
"VBNV",
"FMAP",
"VDTA",
"MECK"
}