components/esp_hal_wdt/README.md
[!NOTE] This component is currently in beta. Its API, behavior, and compatibility may change at any time and without notice; backward compatibility is not guaranteed. Use caution when integrating into production systems.
The ESP Hardware Abstraction Layer for Watch Dog Peripherals (esp_hal_wdt) provides a unified interface to interact with various watchdog timer (WDT) peripherals across all ESP chip families. This component abstracts the hardware-specific details of different watchdog implementations, enabling consistent usage patterns regardless of the underlying hardware.
The component supports multiple types of watchdog timers:
The HAL architecture consists of two primary layers:
HAL Layer (Upper): Defines the operational sequences and data structures required to interact with watch dog peripherals, including:
Low-Level Layer (Bottom): Acts as a translation layer between the HAL and the register definitions in the soc component, handling:
This component is primarily used by ESP-IDF system services such as interrupt watchdog and task watchdog.
For advanced developers implementing custom watch dog solutions, the HAL functions can be used directly. However, please note that the interfaces provided by this component are internal to ESP-IDF and are subject to change.
soc: Provides chip-specific register definitionshal: Core hardware abstraction utilities and macrosesp_hal_timg: Timer group HAL for shared resources with the general purpose timer in the same group